What Is ISP Pinout
ISP (In-System Programming) is a hardware-level technique that allows technicians to communicate directly with the NAND flash storage on the Samsung SM-A90 5G (A9080) PCB, bypassing the device's main processor and operating system entirely. Rather than relying on USB-based protocols such as EDL or ADB, ISP establishes a direct electrical connection to the storage interface test points on the motherboard. For the SM-A90 5G, which uses a UFS (Universal Flash Storage) architecture via the Snapdragon 855 platform, ISP access is achieved by probing specific pads that expose the flash bus signals — CLK, CMD, and DAT lines — allowing a supported programmer to read, write, or erase flash contents at the raw hardware level.
When Technicians Use ISP
ISP becomes the preferred or only viable recovery method in several critical failure scenarios:
- Hard-bricked devices: When the bootloader is corrupted and the phone will not enter EDL or Download Mode through normal means.
- FRP (Factory Reset Protection) lock: When a device is locked to a Google account and software-based bypass methods are unavailable or blocked by firmware version.
- Failed OTA or manual flash: When an interrupted firmware update has rendered the device unbootable and no software recovery is possible.
- Damaged USB port: When the USB/charging port is physically broken, preventing any PC-based software communication.
- IMEI or security partition repair: When direct partition-level access is required for advanced data recovery or security blob restoration.
SM-A90 5G ISP Test Points
The SM-A90 5G (A9080) uses a UFS 2.1 flash interface. The ISP test points are located on the back side of the main PCB, typically near the UFS storage chip. Precise pad coordinates have not been independently verified for public documentation and are marked as uncertain. The standard signal lines to probe are:
- CLK – UFS reference clock line
- CMD / DATA0–DATA7 – UFS data bus lines (8-bit wide)
- GND – Ground reference, multiple available vias near the chip
- VCC / VCCQ – Power rails (1.8 V VCCQ and 2.9 V VCC; do not apply externally unless the board is unpowered)
Technicians should use a high-quality microscope to locate the UFS BGA pads or associated test vias before probing. Exact pad labels on the A9080 PCB are not confirmed in available public documentation.
Connecting to the ISP Port
To connect via ISP on the SM-A90 5G:
- Fully disassemble the device and remove the motherboard.
- Clean the PCB surface around the UFS chip area with IPA and a soft brush.
- Using fine ISP probe wires or a dedicated ISP socket/jig, attach leads to CLK, CMD, DAT0–DAT7, and GND pads.
- Connect the probe harness to a supported ISP tool (e.g., Easy-JTAG Plus with UFS adapter).
- Power the board externally at 3.8 V via a bench power supply if the battery connector is disconnected.
- Launch the ISP tool software, select the SM-A90 5G or Snapdragon 855 UFS profile, and initiate your chosen operation (read, write, or erase).
Safety Tips and Precautions
Working at the ISP level carries significant risk of permanent board damage if proper precautions are not followed:
- Voltage limits: UFS VCCQ operates at 1.8 V. Never exceed this on the data lines. VCC is 2.9 V. Over-voltage will destroy the flash chip instantly.
- ESD protection: Always wear an anti-static wrist strap and work on an ESD-safe mat. The Snapdragon 855 and UFS chip are highly sensitive to static discharge.
- No hot-probing: Attach all ISP wires before applying power. Never connect or disconnect probes while the board is live.
- Use quality probes: Poor-contact probes cause intermittent connections that can corrupt the flash mid-operation, resulting in a permanently bricked device.
- Backup first: Always perform a full flash read/backup before attempting any write or erase operation.
Pin / Test Point Reference
| Pin | Description |
|---|---|
| CLK | UFS clock signal line to flash storage chip — Exact PCB pad location unconfirmed; locate near UFS BGA |
| CMD | UFS command/data signal line — Part of UFS HS-Gear interface; handle with care |
| DAT0 | UFS data bus line 0 — Exact pad coordinate uncertain |
| DAT1 | UFS data bus line 1 — Exact pad coordinate uncertain |
| DAT2 | UFS data bus line 2 — Exact pad coordinate uncertain |
| DAT3 | UFS data bus line 3 — Exact pad coordinate uncertain |
| DAT4 | UFS data bus line 4 — Exact pad coordinate uncertain |
| DAT5 | UFS data bus line 5 — Exact pad coordinate uncertain |
| DAT6 | UFS data bus line 6 — Exact pad coordinate uncertain |
| DAT7 | UFS data bus line 7 — Exact pad coordinate uncertain |
| GND | Ground reference; multiple vias available near UFS chip — Use nearest confirmed ground via to minimise resistance |
| VCC | Flash storage power rail — 2.9 V — Do not apply externally while battery is connected |
| VCCQ | Flash storage I/O power rail — 1.8 V — Critical: exceeding 1.8 V will destroy the UFS chip |
Tools required: Easy-JTAG Plus with UFS adapter, UFI Box, Medusa Pro II, RIFF Box 2 (UFS capable), Bench power supply (3.8 V regulated), Fine-tip ISP probe wires or ISP jig, ESD mat and wrist strap, Digital microscope
Supported operations: Read Firmware / Full Flash Backup, Write Firmware, FRP Erase, Dead Boot Repair, IMEI Repair (partition level), Security Partition Restore, Userdata Wipe
⚠ Safety note: UFS VCCQ is strictly 1.8 V — over-voltage permanently destroys the flash chip. Always ESD-protect the board and back up before any write operation.
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