Overview

The Huawei P Smart 2019 (POT-LX3) is a budget-segment smartphone built on the MediaTek Helio P22 platform. Test points on this device provide direct hardware-level access for firmware operations, FRP (Factory Reset Protection) removal, and boot-level troubleshooting. These test pads are primarily located near the eMMC storage IC and power management circuits, allowing technicians to communicate with the device's storage and recovery systems when standard software methods fail.

Understanding test point locations and their electrical characteristics is essential for professional repair workflows involving this model.

When to Use Test Points

Test points become necessary in the following scenarios:

  • FRP lock removal when standard Google account bypass methods are exhausted
  • Dead-boot conditions where the device does not respond to standard recovery or fastboot commands
  • Firmware flashing or restoration when the device OS is corrupted or missing
  • eMMC direct access for data recovery or partition manipulation
  • EMMC chip-off preparation or diagnostic imaging

These operations require specialized ISP (In-System Programming) tools and should only be performed by trained technicians with appropriate equipment.

Access Procedure

To locate and access test points on the POT-LX3:

  • Power off the device completely and remove the battery (if user-removable)
  • Open the rear casing carefully to expose the main logic board
  • Identify the eMMC IC, typically marked as a BGA package near the CPU area
  • Test pads are often located on the underside of the board or along PCB trace routes near memory chips
  • Use a magnifying lens or digital microscope to identify pad locations precisely
  • Probe pads gently with fine-tipped test leads; avoid excessive pressure that could lift traces

Reference the board revision carefully, as pad locations may vary between manufacturing batches.

Safety Considerations

Critical precautions when working with test points:

  • Verify all power sources are disconnected before probing
  • Use ESD-safe equipment and grounding straps to prevent static discharge damage
  • Do not probe while the device is powered or charging
  • Avoid shorting adjacent pads; incorrect connections can damage the eMMC or CPU
  • Limit measurement probe duration to prevent heat-related damage to board components

Common Measurements

Expected voltage and signal characteristics for the POT-LX3 include eMMC data and clock lines operating at 3.3V logic levels. Ground continuity across test pads should measure 0–2 ohms resistance. Power supply lines (VCC) typically measure 3.3V DC when the device is powered externally via ISP. Clock signals should exhibit digital switching behavior when eMMC operations are active. Proper baseline measurements ensure safe and successful firmware operations.

Pin / Test Point Reference

PinDescription
eMMC_CLKeMMC clock line for data synchronization — 3.3V logic, typically near BGA package
eMMC_CMDeMMC command/response line — 3.3V logic, bidirectional
eMMC_DAT0eMMC data line 0 (primary data path) — 3.3V logic
eMMC_VCCeMMC core power supply — 3.3V nominal
eMMC_GNDGround reference for eMMC — Multiple pads, all tied to system ground
eMMC_RSTeMMC reset signal (active low) — 3.3V logic

Tools required: UMT (Universal Multi-Tool), EasyJTAG Plus, Medusa Pro, Fine-tip oscilloscope probes, Digital multimeter, ESD-safe workspace and grounding, Magnifying lens or USB microscope

Supported operations: FRP Erase, Firmware Read/Write, Dead Boot Repair, eMMC Direct Access, Pattern Unlock, IMEI Repair

âš  Safety note: DO NOT probe while powered. Verify voltage levels before connecting ISP tools. Incorrect pad contact can permanently damage the eMMC or CPU. Use ESD protection at all times. Only use ISP methods if software-based recovery has failed.